sr. fpga engineer in pune

randstad india
position type
apply now

pune, maharashtra
position type
8 To 15
reference number
randstad india
apply now

job description

sr. fpga engineer in pune

?Job Introduction

The senior FPGA Engineer is responsible for implementing advanced driver assistance features on FPGA based multi-camera systems for different customer applications.


Client Introduction
?Reputed client of Randstad India into Design / Engineering domain Automotive.


?FPGA,Design, Vivado, VHDL


?Major Responsibilities

Development (design, implement, test and debug) of specific software requirements for automotive embedded electronic

module serial production projects on an FPGA.

Verify requirements at component and bench level.

Perform complex work assignments requiring independent problem solving and decision making, requiring strong FPGA technical competency.

Work assignments primarily involve senior/advanced level work and may mentor other FPGA engineer. Lead the planning, scheduling, monitoring and reporting of all FPGA related activities for various projects.

Create, simulate and verify logic designs on an FPGA.

Conduct timing analysis of the FPGA design and optimize the designs. Evaluate and Integrate 3rd party logic cores with our designs.

Knowledge and Education

Bachelors degree in Computer Engineering/ Systems Engineering/ Electrical Engineering/ Computer Science or equivalent (Masters preferred)

Work Experience

8+ years FPGA development experience for automotive electronics products.

Expert Knowledge in RTL coding/simulation/debug using VHDL (preferred) and/or Verilog.

Experience in FPGA design on Multi-core Xilinx SoCs, e.g., Zynq7000 and UltraScale+ MPSOC. Experience in designing standard interfaces and protocols such as SPI, I2C, CAN, etc.

Experience in designing high-speed interfaces, e.g., MIPI-CSI2, DDR2/3/4, PCIe, Ethernet, etc.

Familiar with AMBA AXI protocol. Hands-on experience in implementing AXI modules for communication between FPGA and


Familiar with modern image sensor technologies and image processing algorithms. Experience in implementing image processing algorithms in VHDL is a plus.

Skills and Competencies

Familiar with Xilinx Vivado/ISE and Mentor QuestaSim/ModelSim tool chain. Knowledge of version control software.

Working knowledge of CAN and LIN based tools such as CANalyzer, CANoe, CANape, neoVI. Knowledge of C/C++ programming on embedded processors is a plus.

Fluent English in speaking and writing.

Readiness to travel to both domestic and international engineering locations. Excellent communication and presentation skills.

Self-motivation to learn and work with new technologies.